Turbo Clock Switcher - Engineering Application

Turbo Clock Switcher - Engineering Application

Clock profile switcher for timing-sensitive software and test harnesses, enabling controlled transitions between true legacy rates and turbo operation.

Profiles
4.77MHz, 8MHz, 12MHz, board turbo
Switching Logic
Debounced hardware line with deterministic latch state
Feedback
Status LED map plus software verification hooks
Compatibility
AT clones, 386SX, selected 486DX boards
Use Cases
Cycle-sensitive DOS software and diagnostics harnesses
Field Harness
Front-panel and relay control compatible
Ready
Lo-tech ISA CompactFlash Adapter — XT-IDE Storage Solution

Lo-tech ISA CompactFlash Adapter — XT-IDE Storage Solution

The Lo-tech ISA CompactFlash Adapter is an open-source 8-bit ISA card that enables modern CompactFlash storage on IBM PC XT, AT, and compatible systems. Paired with the XTIDE Universal BIOS, it provides silent, reliable mass storage for vintage computers using inexpensive CF cards. The design uses only five through-hole ICs, making it accessible for home assembly. Originally designed by James Pearce at Lo-tech, with hardware schematics and BIOS source code freely available.

Bus Interface
8-bit ISA (fits any PC/XT/AT 8-bit slot)
Storage Media
CompactFlash Type I/II via 40-pin IDE header
I/O Address Range
300h–31Fh (300h–30Fh active)
ROM Address
C800h (32 KB window, directly flashable in-system)
Flash ROM
SST39SF010A 128KB (32 KB used) — in-system programmable
Compatible Flash ICs
SST39SF010A, SST39SF020A, SST39SF040, AMIC A29010
Supply Voltage
5V from ISA bus
IC Count
5 through-hole DIP ICs (basic build)
PCB
2-layer, ISA form factor, through-hole only
BIOS
XTIDE Universal BIOS — GPLv2, supports up to 4 IDE controllers
Transfer Modes
PIO-8 (standard), PIO-8 BIU Offload, PIO-16 BIU Offload
Max Drive Capacity
Unlimited with MS-DOS 7.x/FreeDOS; 8.4 GB limit on DOS 3–6
Ready
Glitch Works XT-IDE Rev 4 — 8-Bit ISA IDE Controller

Latch Read/Write Timing Fix

Alan Hightower identified a race condition with the rev 3 during NetPi-IDE development: IDE read/write lines were de-asserted before the latch interface completed its operations. This only manifested with very fast IDE devices. The fix was verified with an HP 1650A logic analyzer.

Ready
XT-Emporium
Applications
Turbo Clock XT-IDE BIOS CF XT-IDE Rev 4
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